1. Field of the Invention
The invention relates to a multiplexer and a demultiplexer for use in a synchronous digital information transmission network.
2. Description of the Prior Art
In CCITT Recommendations G.707, G.708 and G.709, a synchronous hierarchy of the digital signals is specified. In this, specific multiplex signals, also called multiplex elements, are precisely specified with respect to bit sequence frequency and structure of the pulse frame, e.g., so-called `virtual containers`. If a digital signal of the plesiochronous hierarchy, e.g., a multiplex signal with 139,264 Kbit/s of the fourth stage of the European hierarchy or, for example, a digital television signal coded with the same bit sequence frequency is to be transmitted in a transmission network with the synchronous hierarchy, then it is provided that this signal is inserted into the multiplex signal corresponding to it, the so-called 'virtual container`. Insertion is referred to as `mapping` in the above-mentioned CCITT Recommendations. It consists of the addition of additional words, called `bytes`, for adaptation to the bit sequence frequency or transmission capacity of the particular multiplex signal and of the bitwise stuffing for frequency matching.
The new hierarchy and the associated regulations on the insertion of signals from other hierarchies are described in NTZ Vol. 41 (1988) No. 10, pp. 570-574 and in PKI Tech. Mitt. 1/1989, pp. 7-16. In the first reference mentioned, FIG. 4, which corresponds to FIG. 5.3 of CCITT Recommendation G.709, shows a regulation for the insertion of a useful signal with a bit sequence frequency of 139,264 Kbit/s into a virtual container VC-4. From this regulation and from corresponding regulations for the insertion of other digital signals into corresponding virtual containers, the task arises of creating a circuit arrangement serving to produce a multiplex signal with the prescribed pulse frame from a digital signal and from the additional information to be added, and also of creating a circuit arrangement which again resolves a multiplex signal of this type on the receiving side and recovers the original digital signal from it.
Circuit arrangements of this type can be referred to, in the broader sense, as multiplexers or demultiplexers, because they generate or resolve a digital time-division multiplex signal with a specific pulse frame. They differ from multiplexers and demultiplexers in the narrower sense, e.g., according to definitions 3011 and 3012 in CCITT Recommendation G.702, by the fact that the time-division multiplex signal controlled or resolved by them is not made up of two or more digital signals, but consists essentially of a single digital signal into which additional information and stuffing bits have been inserted.
From the above-mentioned regulation for the pulse frame of the multiplex signal of, for example, one with the virtual container VC-4, the following problems arise, which must be solved in the creation of a multiplexer and demultiplexer for this pulse frame:
A relatively high bit sequence frequency of 139,264 Kbit/s is to be processed. Bitwise processing will therefore require a technology that has the disadvantage of a high, and usually even unacceptable, power consumption. PA1 The pulse frame is structured word by word, in that it consists of successive n-bit words. For the above application of a pulse frame according to FIG. 5.3 of CCITT Recommendation G.709, n=8, but in general, this can also have a different value. PA1 At least at one word position it contains a word, called a stuffing word, which at least in its last bit position contains stuffing bits with an undefined state and bits of the digital signals in the other bit positions. In the application of the pulse frame according to FIG. 5.3/G.709, a word of this type is the 8-bit word designated by Z, which contains a stuffing bit R in its last bit position, a stuffing bit S in its next-to-last bit position only if required, and bits I of the digital signal in the other bit positions. However, a word of this type is also represented by each of the Y-words contained in the pulse frame, which do not contain any bits of the digital signal, but only stuffing bits R.
2. The pulse frame of the time-division multiplex signal is structured word by word, in that it consists of successive 8-bit words. (In the above-mentioned publication NTZ, this property is referred to as `byte oriented frame structure`.) From this, a word-by-word processing, with the advantage of a processing frequency reduced by a factor of 8, would offer itself. On the other hand, however, it is also described that bitwise stuffing is carried out at a specific word position Z, in that at least the last bit R of the Z-word must be stuffed and the next-to-last bit, as required, is or is not a stuffing bit.
This results in the task of the invention, of creating a multiplexer and a demultiplexer which, in accordance with the word structure of the time-division multiplex signal, operates word by word and is nevertheless in a position to carry out bitwise stuffing or to eliminate stuffing bits contained in the pulse frame in a bitwise manner.
It must be pointed out that a task of this type has not yet arisen in the case of known multiplexers and demultiplexers. These either operate bitwise and also stuff bitwise, such as, for example, the multiplexer known from Frecuenz 32 (1978) 10, pp. 281-287, or they operate word by word and do not stuff at all or stuff word by word.